Joseph Salfi
Research Interests
Relevant Thesis-Based Degree Programs
Affiliations to Research Centres, Institutes & Clusters
Graduate Student Supervision
Master's Student Supervision
Theses completed in 2010 or later are listed below. Please note that there is a 6-12 month delay to add the latest theses.
Quantum computers have the ability to perform calculations that are currently intractable on the best supercomputers. While the creation of a universal quantum computer is far removed, an exciting near-term application of quantum computing lies in quantum simulation. Realization of these simulators would allow for computing things like many-particle interactions in materials, leading to scientific advancements. Spin qubits using holes in quantum dots are a promising option towards implementing these near-term quantum simulators, since they have been shown to have long coherence times and are compatible with existing silicon manufacturing technology, making them suitable for scaling.State-of-the-art hole spin qubit systems include the development of two and four-qubit processors. Despite their potential, little work has been made towards enabling scalability of hole-spin qubit platforms. Current simulations employ computational approaches that rely on simplified models and do not take into account device design. In this thesis we develop a simulation framework for hole spin qubits in Ge using realistic gate patterns and examine the effect of this model on key properties of these qubits. We determine that significant differences emerge between the simplified and realistic models, and we quantify these differences. This work defines a minimal model that can be used to predict and optimize spin qubit performance.Germanium is often used for spin qubit platforms because it forms a good ohmic contact with most metals. In doped Ge quantum wells, holes have high mobility and low effective mass, facilitating the confinement of spins. However, highly doped materials contain impurities that degrade the performance of quantum devices at low temperature. Although unexplored, there is interest in using undoped and unstrained Ge epilayers in quantum devices, since they have a higher thermal budget than quantum wells and are an industrial material, allowing for more freedom in fabrication and scaling. In this thesis, we characterize a Ge epilayer substrate by designing and fabricating field-effect transistors and Hall bars to determine the electrical transport properties, carrier concentration and mobility at 4K. We determine that the device displays current-voltage characteristics typical of a transistor.Together, these results advance knowledge on hole spin qubits in Ge.
View record
Large-scale quantum computers have the potential to perform calculations that are otherwise impossible, a capability that could power exciting advances in fields such as materials design and optimization. Building large-scale quantum computers with spin qubits is appealing because they have long coherence times and can be fabricated on silicon chips using an industrial process amenable to scaling. State-of-the-art spin qubit systems are still small, having only just reached the 2-qubit and 4-qubit scale, and their performance and scalability are not optimized yet. Connecting large numbers of spin qubits on chips remains a challenge. In this thesis we demonstrate a simplified fabrication process using a single layer of gates to realize hole spin qubits, anticipated to be easier to scale up than conventional approaches, based on quantum dots formed in a germanium quantum wells on silicon substrates. We also devised a novel approach to reduce contact resistance to the quantum well. Using this process we successfully built quantum dots, as evidenced by Coulomb blockade spectroscopy. Future work will demonstrate quantum bits using this process.Optimization of qubits based on quantum devices requires cooling them down below 4 Kelvin and connecting them to microwave control and measurement circuits. Designing a high frequency control and measurement apparatus is challenging since it requires suppression of stray resonances and crosstalk in the setup.Typically each research group designs its own apparatus, or purchases an expensive apparatus that is not possible to customize. In this thesis, we design and test an apparatus for controlling and measuring few-qubit devices using low-frequency and microwave electrical signals, that can be used to optimize qubit devices.Our setup has -40 dB cross-talk with no resonances up to 7 GHz, and has the advantage of being small in size (
View record
Nonlinearity in superconducting devices has proved to be an essential part of quantum computing. It produces the anharmonicity needed for superconducting qubits, gives rise to parametric amplification, and enhances qubit readout. Although nonlinearity has been thoroughly investigated in Josephson Junction-based devices (JJ), the performance of single JJ devices is hampered by higher-order nonlinearities, and JJ arrays that can overcome this are difficult to fabricate. Moreover, JJ devices suffer from small critical currents, which limits the dynamic range of the device. This spurred the interest towards investigating the Nanowire (NW)-based kinetic inductance devices that offer a naturally distributed non-linearity, ease of fabrication and higher critical currents. Although they have been demonstrated as near-ideal parametric amplifiers, they suffer from weak inductance tunability (weaker nonlinearity) than JJ devices which is a key property in some applications. In this thesis, we investigate two different designs of a more tunable NW-based inductor that tackle the challenges found in the state-of-the-art superconducting devices whose tunability was limited to around 28% using the kinetic inductanceof a single wire. They are based on different approaches where we tune either penetration depth or kinetic inductance. The latter proposal is more sophisticated yet more promising, so it is what we proceed our experiment with. The novel device works by sharing current between parallel inductors with different critical currents and inductances, in order to reduce the impact of fluctuations, e.g., thermal noise or vortices, on tunability in the state-of-the-art. We measured a tunability of 1.6% in this device, higher than the measured 0.4% in our realization of thetypical single-wire device. Further investigation is needed to understand this, and to investigate whether or not the tunability can be increased beyond 28%.
View record
If this is your researcher profile you can log in to the Faculty & Staff portal to update your details and provide recruitment preferences.